At the moment, battery voltage measurements are not synchronised to the 122Hz PWM switching frequency. In fact, an analogue to digital conversion is carried out just as soon as the previous conversion is completed. This results in dozens of samples being taken throughout the PWM cycle.
In the current firmware version, these voltage samples are written to a 16-byte FIFO (first in first out) buffer and processed to determine the highest and lowest values. The mean value of the last 16 samples is calculated and the last value sored is compared with this. It’s a complex (and time consuming) way of determining whether the voltage reading was taken with the FET on or off.
The point of all this is to try and circumvent an inherent problem with battery voltage measurement. When the FET is switched on, voltage measurement will be innacurate. The more current that’s flowing from the solar panel into the battery, the more innacurate the voltage measurement will be. This is because a significant voltage (or potential difference) can exist in the wire connecting the battery to the charge controller (the red wire).
The data processing described above attempts to differentiate between measurements taken when the FET is on, from thos taken when the FET is off. But is’t all a bit haphazard and the processing algorithm takes a lot of CPU time.
There is an alternative mechanism, but it will require a considerable number of changes to the firmware including a switch to ‘active low’ PWM mode and possible use of interrupts.
The idea is to take one voltage measurement during each PWM cycle, so that’s 122 measurements per second. The measurement would be taken immediately after the FET turns off, so that the measurement is accurate. During bulk charge the FET is always on, so a tiny measurement window would have to be introduced during which the FET is turned off. This might be 1% of the 8.2ms PWM period, performed once every 5 seconds.
The issues are:
The Timer2 interrupt flag is set when TMR2 is equal to PR2. This is the point at which the PWM output pin goes high. This is the wrong way round for accurate voltage measurement, but can be fixed by putting the PWM hardware into active-low mode.
The voltage measurement must be taken immediately and consistently after the FET switches off. This may require the use of the interrupt structure.
ADC conversion takes 10 clock cycles. That’s 20us at 500kHz clock frequency. The interrupt response will add a few more microseconds. The PWM period is 8.2ms (8,200us) made up of 256 lots of 32us. So theoretically, all duty cycle values below 255 would allow enough time to take a voltage measurement. It may be sensible to allow 64us.
Sequence of work:
- Subroutine out the data analysis code
- Switch to active-low PWM mode
- Enable interrupt on Timer2
- Define a mode flag for accurate/innaccurate
- Build a mechanism for periodic accurate voltage measurement
There is a silver lining here. During bulk charge (PWM at 100%), accurate voltage measurements are only needed for display purposes, so we can get away with doing this infrequently (once every 5 seconds is enough). The feedback control loop is not operating in bulk charge mode.
In PWM mode, accurate voltage measurements are needed every 8.2ms to keep the control loop stable. Unless the duty cycle is at 254 or 255 (which is almost never) accurate voltage measurements will be possible. Serendipity on our side!